Hitherto, in the field for encapsulating elements in electronic member devices such as transistors and ICs, encapsulation with resin has been becoming the main current from the viewpoint of productivity, costs and others, and epoxy resin molding material has widely been used. This is because epoxy resin is good in balance between various properties, such as electrical property, humidity resistance, heat resistance, mechanical property, and adhesive property to inserted articles.
In recent years, a phenomenon that electronic parts are mounted on a printed-wiring board at a higher density has been making an advance. In connection therewith, about semiconductor devices, surface mounted type packages have been become the main current instead of conventional pin inserted type packages. About surface mounted type ICs, LSIs, or the like, the package thereof is thin and small-sized in order to make the package density high and make the package height low. Thus, the occupation volume of the elements in the package has become large and the thickness of the package has become very small. The elements have come to have a multifunction and a large capacity, and accordingly the area of the chip therefor and the number of pins there for have been increased. Furthermore, on the basis of an increase in the number of pads (electrodes) therefor, the pitch of the pads and the dimensions of the pads have been decreasing. Thus, the so-called pad-pitch-narrowing has also been advancing. In order to cope with a further reduction in the size and the weight, the form of packages has been changing from a quad flat package (QFP) or a small outline package (SOP) to a chip size package (CSP) or a ball grid array (BGA), which copes easily with an increase in pins therein and can attain higher density packaging. About these packages, in recent years, new structure types such as a face-down type, a stacked type, a flip chip type and a wafer level type have been developed in order to realize high operation-speed or multifunctional semiconductor devices.
Flip chip packaging is a connecting technique instead of conventional wire bonding. Solder bumps are stuck onto pads of a semiconductor chip, and the bumps are used to connect them to lands on a wiring board. The chip onto which the solder bumps are stuck is positioned on the wiring board, and then the solder is melted by reflow. Electric and mechanical connections are then formed through a self alignment process. In the thus-packaged device, an under filler is filled into a gap between the chip and the wiring board in order to improve various reliabilities. The under filler is required to have a high filling ability in order to fill the material completely into the narrow gap, wherein the solder bumps are arranged, without generating cavities such as voids.
In order to solve this problem, there has been hitherto adopted a method of using an encapsulating epoxy resin molding material of a solvent or non-solvent liquid type which is made mainly of a bisphenol epoxy resin, penetrating the material into the gap between the chip and the wiring board by use of capillarity, and then curing the material.
However, the liquid type encapsulating epoxy resin molding material is expensive. Thus, from the viewpoint of a reduction in costs, a new vacuum-manner molding technique using a solid type encapsulating epoxy resin molding material has been developed for an under fill for flip chips. However, the conventional solid type molding material has a low filling ability. As a result, it is difficult to encapsulate semiconductor elements without generating defects such as voids in the present circumferences. For example, in the production of a next-generation flip chip type semiconductor device having solder bumps arrange data fine pitch, at the time of encapsulating it with a conventional solid type encapsulating epoxy resin, the filling thereof into an under fill portion is unsatisfactorily because of the generation of voids having a somewhat large size of about 0.1 mm in diameter. Hereafter, a higher filling ability will be required in light of a tendency that the height and pitch of bumps decrease and further the number of the bumps and the chip area increase, following an increase in the number of inputs and outputs.
For this reason, an encapsulating epoxy resin molding material has been desired which is excellent in filling ability suitable as an under filler for flip chip packaging. Furthermore, a flip chip type semiconductor device has been desired which has solder bumps arranged at a fine pitch, has no molding defects, and is good in reliabilities such as reflow resistance and humidity resistance.
Incidentally, for semiconductor devices in an up-to-date field, the mold array package (MAP) molding manner is established instead of lead frames which have been conventionally used as inserts, the MAP molding manner being a manner of mounting plural elements on an organic substrate, a ceramic substrate or the like, package-molding them with an epoxy resin molding material, and then cutting and separating the elements. This manner has been becoming the main current of molding manners from the viewpoint of a reduction in member costs and an improvement in productivity. In this case, there has been developed a method called flip chip packaging, wherein solder balls are fitted to elements instead of Au lines used as connectors between the elements and wiring and then the solder balls are used to connect the elements to lands on a wiring board, from the viewpoint of high-speed operability and high functionalization of the elements. A chip onto which solder balls are stuck is positioned on a wiring board, and then the solder is melted by reflow. Through a self-alignment process, electrical and mechanical connections are then formed therein.
However, according to flip chip packaging, the surface of elements and solder ball portions contact outer air. Therefore, the reliability is remarkably lowered. For this reason, investigations have been made for improving the reliability, making the size of semiconductors small, making the operating speed thereof high, and improving the productivity thereof by combining the packaging with the above-mentioned MAP molding manner.
Problems caused by combining the flip chip packaging with the MAP molding manner are a warp of a molded substrate, and a warp of packages cut into individual pieces. The substrate warp remarkably causes difficulties in the step of cutting and separating molded semiconductors into individual pieces or at the time of fitting solder bumps. Furthermore, the package warp causes poor connection at the time of mounting the package on a wiring board since the package is poor in flatness.
In order to solve this problem, a method of filling a liquid resin called an under filler has been hitherto investigated as a technique for encapsulating the surface of elements and solder ball portions. However, the liquid resin is more expensive than epoxy resin molding material, and easily causes a substrate warp after the curing of the resin is finished. For this reason, this method does not cope with encapsulation of large-sized substrates for an improvement in productivity. Thus, investigation on the application of epoxy resin molding material, which is inexpensive and is excellent in dimension stability, thereto has been started.
A new vacuum-manner molding technique using an encapsulating epoxy resin molding material of a solid type has been developed for an under fill for a flip chip. However, about conventional solid type molding material, there is adopted a method of making the amount of the filler lower than that of epoxy resin molding material for SMD from the viewpoint of an improvement in filling ability. Accordingly, a substrate warp and a package warp are easily generated by a shrinkage in the epoxy resin molding material after the material is cured.
Accordingly, there have been desired: an encapsulating epoxy resin molding material which keeps filling ability suitable for an under filler for flip chip packaging and less causes a substrate warp and a package warp after the substrate is encapsulated by the material; and a flip chip package type semiconductor device which is encapsulated by this material, has no molding defects such as voids, and is good in reliabilities such as reflow resistance and humidity resistance.
According to a first aspect of the present invention, an encapsulating epoxy resin molding material which is suitable for encapsulating a flip chip type package type semiconductor device and which has bumps arranged at a fine pitch and has a large number of inputs and outputs (a large number of the bumps) is provided. A flip chip type package type semiconductor device which has bumps arranged at a fine pitch, has a large number of inputs and outputs (a large number of the bumps) and is encapsulated by the encapsulating epoxy resin molding material according to the present invention is also provided.
According to a second aspect of the present invention, an encapsulating epoxy resin molding material which causes a decrease in the following: inconveniences in production which are caused by a warp of an encapsulated substrate of a flip chip package type semiconductor device; and a failure in mounting onto a wiring board, the failure being based on a warp of the package is provided. A flip chip package type semiconductor device which is encapsulated by the encapsulating epoxy resin molding material according to the present invention and causes a decrease in the following: inconveniences in production which are caused by a warp of an encapsulated substrate; and a failure in mounting onto a wiring board, the failure being based on a warp of the package is also provided.